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19-4123; Rev 2; 10/08
15A Step-Down Regulator with Internal Switches
General Description
The MAX15035 pulse-width modulation (PWM) controller provides high efficiency, excellent transient response, and high DC-output accuracy. Combined with the internal low on-resistance MOSFETs, the MAX15035 provides a highly efficient and compact solution for small form factor applications that need a high-power density. Maxim's proprietary Quick-PWMTM quick-response, constant on-time PWM control scheme handles wide input/output voltage ratios (low-duty-cycle applications) with ease and provides 100ns instant-on response to load transients while maintaining a relatively constant switching frequency. The output voltage can be dynamically controlled using the dynamic REFIN, which supports input voltages between 0V to 2V. The REFIN adjustability combined with a resistive voltage-divider on the feedback input allows the MAX15035 to be configured for any output voltage between 0V to 0.9VIN. The controller senses the current across the synchronous rectifier to achieve a low-cost and highly efficient valley current-limit protection. External current-limit control is provided to allow higher current-limit settings for applications with heatsinks and air flow, or for lower current applications that need lower current-limit settings to avoid overdesigning the application circuit. The adjustable current limit provides a high degree of flexibility, allowing thermally compensated protection or foldback current-limit protection using a voltage-divider partially derived from the output. The MAX15035 includes a voltage-controlled soft-start and soft-shutdown to limit the input surge current, provide a monotonic power-up into a precharged output, and provide a predictable soft-start time. The controller also includes output fault protection--undervoltage and overvoltage protection--as well as thermal-fault protection. The MAX15035 is available in a small 40-pin, 6mm x 6mm, TQFN package. o 4.5V to 26V Input Voltage Range o Fast Transient Response o Monotonic Power-Up with Precharged Output o Supports Any Output Capacitor No Compensation Required with Polymers/ Tantalum Stable with Ceramic Output Capacitors Using External Compensation o Dynamically Adjustable Output Voltage 0.5% VOUT Accuracy Over Line and Load o Adjustable Valley Current-Limit Protection Thermal Compensation with NTC Supports Foldback Current Limit o Programmable Switching Frequency o Overvoltage Protection o Undervoltage Protection o Voltage Soft-Start and Soft-Shutdown o Power-Good Window Comparator
Features
MAX15035
Ordering Information
PART MAX15035ETL+ TEMP RANGE -40C to +85C PIN-PACKAGE 40 TQFN-EP*
+Denotes a lead-free/RoHS-compliant package. *EP = Exposed pad.
Pin Configuration
AGND TON IN IN IN IN 30 29 28 27 26 25 24 23 22 21 N.C. 31 FB 32 ILIM 33 REFIN 34 REF 35 SKIP 36 VCC 37 PGOOD 38 N.C. 39 N.C. 40 LX AGND EP1 EP3 20 IN IN 19 IN 18 IN IN IN 17 N.C. 16 LX 15 PGND 14 PGND 13 PGND 12 PGND 11 PGND 1 N.C. 2 EN 3 AGND 4 VDD 5 LX 6 PGND 7 PGND 8 PGND 9 PGND 10 PGND
TOP VIEW
Applications
Server Computers GPU Core Supplies DDR Memory--VDDQ or VTT Point-of-Load Applications Step-Down Power Supplies Storage Power Supplies
EP2
+
Quick-PWM is a trademark of Maxim Integrated Products, Inc.
THIN QFN (6mm x 6mm)
________________________________________________________________ Maxim Integrated Products
N.C.
BST
MAX15035
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
15A Step-Down Regulator with Internal Switches MAX15035
ABSOLUTE MAXIMUM RATINGS
IN to PGND.............................................................-0.3V to +28V TON to GND ...........................................................-0.3V to +28V VDD to GND ..............................................................-0.3V to +6V VCC to GND ................................................-0.3V to (VDD + 0.3V) EN, SKIP, PGOOD to GND.......................................-0.3V to +6V REF, REFIN to GND....................................-0.3V to (VCC + 0.3V) ILIM, FB to GND .........................................-0.3V to (VCC + 0.3V) GND to PGND .......................................................-0.3V to +0.3V LX to PGND ...............................................................-1V to +28V BST to PGND...............................................(VDD - 0.3V) to +34V BST to LX..................................................................-0.3V to +6V BST to VDD .............................................................-0.3V to +28V REF Short Circuit to GND ...........................................Continuous IN RMS Current Rating (continuous)......................................15A PGND RMS Current Rating (continuous) ...............................20A Continuous Power Dissipation (TA = +70C) 40-Pin, 6mm x 6mm Thin QFN (T4066-MCM) (derate 27mW/C above +70C) ................................2162mW Operating Temperature Range ...........................-40C to +85C Junction Temperature Range ..........................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1, VIN = 12V, VDD = VCC = VEN = 5V, REFIN = ILIM = REF, SKIP = GND. TA = 0C to +85C, unless otherwise specified. Typical values are at TA = +25C.) (Note 1)
PARAMETER PWM CONTROLLER Input Voltage Range Quiescent Supply Current (VDD) Shutdown Supply Current (VDD) VCC Undervoltage Lockout Threshold VDD-to-VCC Resistance On-Time Minimum Off-Time TON Shutdown Supply Current REFIN Voltage Range REFIN Input Current FB Voltage Range VREFIN IREFIN VFB VIN IDD + ICC ISHDN FB forced above REFIN EN = GND, TA = +25C 3.95 4.5 0.7 0.1 4.2 20 VIN = 12V, VFB = 1.0V (Note 3) (Note 3) EN = GND, VTON = 26V, VCC = 0V or 5V, TA = +25C (Note 2) TA = +25C, REFIN = 0.5V to 2V (Note 2) VREFIN = 0.5V, measured at FB, VIN = 4.5V to 26V, SKIP = VDD VREFIN = 1.0V VREFIN = 2.0V FB Input Bias Current FB Output Low Voltage Load-Regulation Error Line-Regulation Error IFB ISINK = 3mA SKIP = VDD VCC = 4.5V to 5.5V, VIN = 4.5V to 26V 0.1 0.2 TA = +25C TA = 0C to +85C TA = +25C TA = 0C to +85C TA = 0C to +85C 0 -50 0 0.495 0.493 0.995 0.993 1.990 -0.1 2.0 1.0 0.5 RTON = 97.5k (600kHz) RTON = 200k (300kHz) RTON = 302.5k (200kHz) 123 275 379 164 303 442 225 0.01 205 331 505 350 1 VREF +50 VREF 0.505 0.507 V 1.005 1.007 2.010 +0.1 0.4 A V % % ns A V nA V ns 26.0 1.2 2 4.45 V mA A V SYMBOL CONDITIONS MIN TYP MAX UNITS
Rising edge, PWM disabled below this VUVLO(VCC) level; hysteresis = 100mV RCC tON tOFF(MIN)
FB Voltage Accuracy
VFB
VFB = 0.5V to 2.0V, TA = +25C
2
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15A Step-Down Regulator with Internal Switches
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, VIN = 12V, VDD = VCC = VEN = 5V, REFIN = ILIM = REF, SKIP = GND. TA = 0C to +85C, unless otherwise specified. Typical values are at TA = +25C.) (Note 1)
PARAMETER Soft-Start/Soft-Stop Slew Rate Dynamic REFIN Slew Rate REFERENCE Reference Voltage FAULT DETECTION With respect to the internal target voltage (error comparator threshold); rising edge; hysteresis = 50mV OVP Dynamic transition Minimum OVP threshold Output Overvoltage Fault-Propagation Delay Output Undervoltage-Protection Trip Threshold Output Undervoltage Fault-Propagation Delay PGOOD Propagation Delay PGOOD Output-Low Voltage PGOOD Leakage Current Dynamic REFIN Transition Fault Blanking Threshold Thermal-Shutdown Threshold CURRENT LIMIT ILIM Input Range ILIM Input Bias Current Current-Limit Threshold Current-Limit Threshold (Negative) Current-Limit Threshold (Zero Crossing) Ultrasonic Frequency VILIMIT VINEG VZX TA = +25C, ILIM = 0.4V to 2V VILIM = 0.4V, VGND - VLX ILIM = REF (2.0V), VGND - VLX VILIM = 0.4V, VGND - VLX VILIM = 0.4V, VGND - VLX, SKIP = GND or open SKIP = open (3.3V); VFB = VREFIN + 50mV 18 0.4 -0.1 18 92 20 100 -24 1 30 VREF +0.1 22 108 V A mV mV mV kHz TSHDN IPGOOD tOVP FB forced 25mV above trip threshold With respect to the internal target voltage (error comparator threshold) falling edge; hysteresis = 50mV FB forced 25mV below trip threshold UVP falling edge, 25mV overdrive tPGOOD OVP rising edge, 25mV overdrive Startup delay ISINK = 3mA FB = REFIN (PGOOD high impedance), PGOOD forced to 5V, TA = +25C Fault blanking initiated; REFIN deviation from the internal target voltage (error comparator threshold); hysteresis = 10mV Temperature rising, hysteresis = 15C 50 160 100 250 300 VREF + 0.30 0.7 5 s 350 mV VREF VCC = 4.5V to 5.5V No load IREF = -10A to +50A 1.990 1.98 2.00 2.010 2.02 V SYMBOL SSSR DYNSR CONDITIONS Rising/falling edge on EN Rising edge on REFIN MIN 0.4 3 TYP 1.2 9.45 MAX 2.2 18 UNITS mV/s mV/s
MAX15035
Output Overvoltage-Protection Trip Threshold
V
UVP
-240
-200
-160
mV
tUVP
100
200 5 5 200
350
s
s 350 0.4 1 V A
mV C
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3
15A Step-Down Regulator with Internal Switches MAX15035
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, VIN = 12V, VDD = VCC = VEN = 5V, REFIN = ILIM = REF, SKIP = GND. TA = 0C to +85C, unless otherwise specified. Typical values are at TA = +25C.) (Note 1)
PARAMETER Ultrasonic Current-Limit Threshold Internal BST Switch On-Resistance INPUTS AND OUTPUTS EN Logic-Input Threshold EN Logic-Input Current VEN IEN EN rising edge, hysteresis = 450mV (typ) EN forced to GND or VDD, TA = +25C High (5V VDD) SKIP Quad-Level Input Logic Levels VSKIP Open (3.3V) Ref (2.0V) Low (GND) SKIP Logic-Input Current ISKIP SKIP forced to GND or VDD, TA = +25C -2 1.20 -0.5 VCC 0.4 3.0 1.7 3.6 2.3 0.4 +2 A V 1.7 2.20 +0.5 V A RBST SYMBOL CONDITIONS SKIP = open (3.3V); VFB = VREFIN + 50mV, VGND - VLX IBST = 10mA, VDD = 5V MIN TYP -35 4 7 MAX UNITS mV
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1, VIN = 12V, VDD = VCC = VEN = 5V, REFIN = ILIM = REF, SKIP = GND. TA = -40C to +85C, unless otherwise specified.) (Note 1)
PARAMETER PWM CONTROLLER Input Voltage Range Quiescent Supply Current (VDD) On-Time Minimum Off-Time REFIN Voltage Range FB Voltage Range VIN IDD + ICC tON tOFF(MIN) VREFIN VFB FB forced above REFIN VIN = 12V, VFB = 1.0V (Note 3) (Note 3) (Note 2) (Note 2) Measured at FB, VIN = 4.5V to 26V, SKIP = VDD VREFIN = 0.5V VREFIN = 1.0V VREFIN = 2.0V 0 0 0.49 0.99 1.985 RTON = 97.5k (600kHz) RTON = 200k (300kHz) RTON = 302.5k (200kHz) 115 270 368 4.5 26 1.2 213 336 516 400 VREF VREF 0.51 1.01 2.015 V ns V V ns V mA SYMBOL CONDITIONS MIN MAX UNITS
FB Voltage Accuracy
VFB
4
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15A Step-Down Regulator with Internal Switches
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, VIN = 12V, VDD = VCC = VEN = 5V, REFIN = ILIM = REF, SKIP = GND. TA = -40C to +85C, unless otherwise specified.) (Note 1)
PARAMETER REFERENCE Reference Voltage FAULT DETECTION Output Overvoltage-Protection Trip Threshold Output Undervoltage-Protection Trip Threshold Output Undervoltage Fault-Propagation Delay PGOOD Output-Low Voltage VCC Undervoltage Lockout Threshold CURRENT LIMIT ILIM Input Range Current-Limit Threshold Ultrasonic Frequency INPUTS AND OUTPUTS EN Logic-Input Threshold VEN EN rising edge hysteresis = 450mV (typ) High (5V VDD) SKIP Quad-Level Input Logic Levels V SKIP Mid (3.3V) Ref (2.0V) Low (GND) 1.20 VCC 0.4 3.0 1.7 3.6 2.3 0.4 V 2.20 V VILIMIT VILIM = 0.4V, VGND = VLX ILIM = REF (2.0V), VGND - VLX SKIP = open (3.3V), VFB = VREFIN + 50mV 0.4 17 90 17 VREF 23 110 V mV kHz OVP With respect to the internal target voltage (error comparator threshold) rising edge; hysteresis = 50mV With respect to the internal target voltage (error comparator threshold); falling edge; hysteresis = 50mV FB forced 25mV below trip threshold ISINK = 3mA Rising edge, PWM disabled below this level, VUVLO(VCC) hysteresis = 100mV 3.95 250 350 mV VREF VDD = 4.5V to 5.5V 1.985 2.015 V SYMBOL CONDITIONS MIN MAX UNITS
MAX15035
UVP
-240
-160
mV
tUVP
80
400 0.4 4.45
s V V
Note 1: Limits are 100% production tested at TA = +25C. Maximum and minimum limits over temperature are guaranteed by design and characterization. Note 2: The 0 to 0.5V range is guaranteed by design, not production tested. Note 3: On-time and off-time specifications are measured from 50% point to 50% point at the unloaded LX node. The typical 25ns dead time that occurs between the high-side driver falling edge (high-side MOSFET turn-off) and the low-side MOSFET turnon) is included in the on-time measurement. Similarly, the typical 25ns dead time that occurs between the low-side driver falling edge (low-side MOSFET turn-off) and the high-side driver rising edge (high-side MOSFET turn-on) is included in the off-time measurement.
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5
15A Step-Down Regulator with Internal Switches MAX15035
Typical Operating Characteristics
(MAX15035 Circuit of Figure 1, VIN = 12V, VDD = 5V, SKIP = GND, RTON = 200k, TA = +25C, unless otherwise noted.)
1.5V OUTPUT EFFICIENCY vs. LOAD CURRENT
MAX15035 toc01
1.5V OUTPUT EFFICIENCY vs. LOAD CURRENT
SKIP MODE
MAX15035 toc02
1.5V OUTPUT VOLTAGE vs. LOAD CURRENT
ULTRASONIC MODE OUTPUT VOLTAGE (V)
MAX15035 toc03
100 90 80 EFFICIENCY (%) 7V 70 60 50 40 30 20 0.01 0.1 1 LOAD CURRENT (A) 10 SKIP MODE PWM MODE 12V 20V
100 90 80 EFFICIENCY (%) 70 60 50 40 30 20
1.515
PWM MODE
1.505 SKIP MODE PWM MODE 1.495
ULTRASONIC MODE
1.485 0.01 0.1 1 LOAD CURRENT (A) 10 100 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 LOAD CURRENT (A)
100
1.05V OUTPUT EFFICIENCY vs. LOAD CURRENT
MAX15035 toc04
1.05V OUTPUT EFFICIENCY vs. LOAD CURRENT
SKIP MODE 90 80 EFFICIENCY (%) 70 60 50 40 ULTRASONIC MODE 1.04 0.01 0.1 1 LOAD CURRENT (A) 10 100 PWM MODE
MAX15035 toc05
1.05V OUTPUT VOLTAGE vs. LOAD CURRENT
MAX15035 toc06
100 7V 90 80 EFFICIENCY (%) 70 60 20V 50 40 30 20 0.01 0.1 1 LOAD CURRENT (A) 10 SKIP MODE PWM MODE 12V 20V 12V
100
1.06
OUTPUT VOLTAGE (V)
1.05
ULTRASONIC MODE SKIP MODE
PWM MODE
30 20 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 LOAD CURRENT (A)
100
3.3V OUTPUT EFFICIENCY vs. LOAD CURRENT
MAX15035 toc07
3.3V OUTPUT EFFICIENCY vs. LOAD CURRENT
SKIP MODE 90 80 EFFICIENCY (%) PWM MODE 70 60 50 40 ULTRASONIC MODE
MAX15035 toc08
3.3V OUTPUT VOLTAGE vs. LOAD CURRENT
3.380 3.365 OUTPUT VOLTAGE (V) 3.350 3.335 3.320 3.305 3.290 3.275 3.260 3.245 3.230 PWM MODE SKIP MODE ULTRASONIC MODE
MAX15035 toc09
100 90 80 EFFICIENCY (%) 70 60 50 7V 40 30 20 0.01 0.1 1 LOAD CURRENT (A) 10 SKIP MODE PWM MODE 12V 20V
100
30 20 0.01 0.1 1 LOAD CURRENT (A) 10 100
100
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 LOAD CURRENT (A)
6
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15A Step-Down Regulator with Internal Switches MAX15035 MAX15035
Typical Operating Characteristics (continued)
(MAX15035 Circuit of Figure 1, VIN = 12V, VDD = 5V, SKIP = GND, RTON = 200k, TA = +25C, unless otherwise noted.)
SWITCHING FREQUENCY vs. LOAD CURRENT
MAX15035 toc10
PWM MODE SWITCHING FREQUENCY vs. INPUT VOLTAGE
380 370 360 350 340 330 320 310 300 290 280 270 260 250 240 6 8 10 12
MAX15035 toc11
SWITCHING FREQUENCY vs. TEMPERATURE
MAX15035 toc12
400 350 SWITCHING FREQUENCY (kHz) PWM MODE 300 250 200 150 100 50 0 0.01 0.1 1 ULTRASONIC MODE SKIP MODE
390 ILOAD = 10A
SWITCHING FREQUENCY (kHz)
ILOAD = 5A
SWITCHING FREQUENCY (kHz)
380
370
NO LOAD
360
ILOAD = 5A
350 14 16 18 20 22 24 -40 -20 0 20 40 60 80 100 INPUT VOLTAGE (V) TEMPERATURE (C)
10
LOAD CURRENT (A)
MAXIMUM OUTPUT CURRENT vs. INPUT VOLTAGE
MAX15035 toc13
MAXIMUM OUTPUT CURRENT vs. AMBIENT TEMPERATURE
MAX15035 toc14
NO-LOAD SUPPLY CURRENT (IBIAS) vs. INPUT VOLTAGE
MAX15035 toc15
16.00 15.80 MAXIMUM OUTPUT CURRENT (A) 15.60 15.40 15.20 15.00 14.80 14.60 14.40 14.20 14.00 6 9 12 15 18 21
12 10 8 IBIAS (mA) 6 4 ULTRASONIC MODE 2 SKIP MODE 0 PWM MODE
15 MAXIMUM OUTPUT CURRENT (A) 0 LFM 13 11 9 7 5 100 LFM 300 LFM
FOUR-LAYER PCB WITH 2oz COPPER USED -40 -20 0 20 40 60 80 100
24
6
8
10
12
14
16
18
20
22
24
INPUT VOLTAGE (V)
TEMPERATURE (C)
INPUT VOLTAGE (V)
NO-LOAD SUPPLY CURRENT (IIN) vs. INPUT VOLTAGE
MAX15035 toc16
REF OUTPUT VOLTAGE vs. LOAD CURRENT
MAX15035 toc17
100
2.005
10 IIN (mA)
REF OUTPUT VOLTAGE (V) 20 22 24
PWM MODE
2.004
1
ULTRASONIC MODE
2.003
2.002
0.1
SKIP MODE
2.001
0.01 6 8 10 12 14 16 18 INPUT VOLTAGE (V)
2.000 -10 0 10 20 30 40 50 LOAD CURRENT (A)
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7
15A Step-Down Regulator with Internal Switches MAX15035
Typical Operating Characteristics (continued)
(MAX15035 Circuit of Figure 1, VIN = 12V, VDD = 5V, SKIP = GND, RTON = 200k, TA = +25C, unless otherwise noted.)
SOFT-START WAVEFORM (HEAVY LOAD)
MAX15035 toc18
SOFT-START WAVEFORM (LIGHT LOAD)
MAX15035 toc19
5V 0 5V 0 1.5V 0 8A 0 200s/div C. VOUT, 1V/div B. INDUCTOR CURRENT, 10A/div
A B C
5V 0 5V 0 1.5V 0
A B
C
D 1A 0 200s/div C. VOUT, 1V/div B. INDUCTOR CURRENT, 10A/div D
A. EN, 5V/div B. PGOOD, 5V/div IOUT = 8A
A. EN, 5V/div B. PGOOD, 5V/div IOUT = 1A
SHUTDOWN WAVEFORM
MAX15035 toc20
LOAD-TRANSIENT RESPONSE (PWM MODE)
MAX15035 toc21
5V 0 5V 0 1.5V 0 8A 0
A
8A 1A
A
B
C
1.5V
B
D
8A C 0A
A. EN, 5V/div B. PGOOD, 5V/div IOUT = 6A
200s/div C. VOUT, 1V/div B. INDUCTOR CURRENT, 5A/div
A. IOUT, 10A/div
20s/div B. VOUT, 20mV/div C. INDUCTOR CURRENT, IOUT = 1A TO 8A TO 1A 5A/div
8
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15A Step-Down Regulator with Internal Switches MAX15035
Typical Operating Characteristics (continued)
(MAX15035 Circuit of Figure 1, VIN = 12V, VDD = 5V, SKIP = GND, RTON = 200k, TA = +25C, unless otherwise noted.)
LOAD-TRANSIENT RESPONSE (SKIP MODE)
MAX15035 toc22
OUTPUT OVERCURRENT WAVEFORM
MAX15035 toc23
OUTPUT OVERVOLTAGE WAVEFORM
MAX15035 toc24
8A 1A
20A A 0 A 1.5V A
1.5V
B
1.5V B
0
8A 0A C
0 5V 0 C 200s/div A. INDUCTOR CURRENT, B. VOUT, 1V/div 10A/div C. PGOOD, 5V/div IOUT = 2A TO 20A
5V 0 200s/div A. VOUT, 1V/div IOUT = 2A TO 20A B. PGOOD, 5V/div
B
A. IOUT, 10A/div
20s/div B. VOUT, 20mV/div C. INDUCTOR CURRENT, IOUT = 1A TO 8A TO 1A 5A/div
NO-LOAD BIAS CURRENT vs. FREQUENCY
MAX15035 toc25
OUTPUT CURRENT LIMIT vs. ILIMIT VOLTAGE
MAX15035 toc26
PREBIAS STARTUP-OUTPUT VOLTAGE
MAX15035 toc27
30 28 26 24 IBIAS (mA) 22 20 18 16 14 12 10 8 PWM MODE
20 18 CURRENT LIMIT (A) 16 14 12 10 8
1.5V 1.2V
500mV/div
200 250 300 350 400 450 500 550 600 FREQUENCY (kHz)
500
600
700
800
900
1000
200s/div
ILIMIT VOLTAGE (mV)
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9
15A Step-Down Regulator with Internal Switches MAX15035
Typical Operating Characteristics (continued)
(MAX15035 Circuit of Figure 1, VIN = 12V, VDD = 5V, SKIP = GND, RTON = 200k, TA = +25C, unless otherwise noted.)
DYNAMIC OUTPUT-VOLTAGE TRANSITION (PWM MODE)
MAX15035 toc28
DYNAMIC OUTPUT-VOLTAGE TRANSITION (SKIP MODE)
MAX15035 toc29
1.5V 1.05V 1.5V
A
1.5V 1.05V 1.5V A
B 1.05V 0 -6A 12V D 0 A. REFIN, 500mV/div B. VOUT, 200mV/div IOUT = 2A 40s/div C. INDUCTOR CURRENT, 10A/div D. LX, 10V/div 1.05V C 10A 0 12V 0 A. REFIN, 500mV/div B. VOUT, 200mV/div IOUT = 2A 40s/div C. INDUCTOR CURRENT, 10A/div D. LX, 10V/div
B
C
D
Pin Description
PIN 1, 17, 27, 31, 39, 40 NAME N.C. No Connection. Not internally connected. Shutdown Control Input. Connect to VDD for normal operation. Pull EN low to put the controller into its 2A (max) shutdown state. The MAX15035 slowly ramps down the target/output voltage to ground and after the target voltage reaches 0.1V, the controller forces LX into a high-impedance state and enters the low-power shutdown state. Toggle EN to clear the fault-protection latch. Analog Ground. Internally connected to EP1. Supply Voltage Input for the DL Gate Driver. Connect to the system supply voltage (+4.5V to +5.5V). Bypass VDD to power ground with a 1F or greater ceramic capacitor. Inductor Connection. Internally connected to EP2. Connect LX to the switched side of the inductor as shown in Figure 1. Power Ground Power MOSFET Input Power Source. Internally connected to EP3. Switching Frequency-Setting Input. An external resistor between the input power source and TON sets the switching period (tSW = 1/fSW) according to the following equation:
V tSW = CTON (RTON + 6.5k ) FB VOUT
FUNCTION
2
EN
3, 28 4 5, 16 6-15 18-26
AGND VDD LX PGND IN
29
TON
where CTON = 16.26pF and VFB = VREFIN under normal operating conditions. If the TON current drops below 10A, the MAX15035 shuts down and enters a high-impedance state. TON is high impedance in shutdown. 30 BST Boost Flying Capacitor Connection. Connect to an external 0.1F capacitor as shown in Figure 1. The MAX15035 contains an internal boost switch/diode (Figure 2).
10
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15A Step-Down Regulator with Internal Switches
Pin Description (continued)
PIN NAME FUNCTION Feedback Voltage Sense Connection. Connect directly to the positive terminal of the output capacitors for output voltages less than 2V as shown in Figure 1. For fixed-output voltages greater than 2V, connect REFIN to REF and use a resistive divider to set the output voltage (Figure 6). FB senses the output voltage to determine the on-time for the high-side switching MOSFET. Current-Limit Threshold Adjustment. The current-limit threshold is 0.05 times (1/20) the voltage at ILIM. Connect ILIM to a resistive divider (from REF) to set the current-limit threshold between 20mV and 100mV (with 0.4V to 2V at ILIM). External Reference Input. REFIN sets the feedback regulation voltage (VFB = VREFIN) of the MAX15035 using a resistor-divider connected between REF and AGND. The MAX15035 includes an internal window comparator to detect REFIN voltage transitions, allowing the controller to blank PGOOD and the fault protection. 2V Reference Voltage. Bypass to analog ground using a 1nF ceramic capacitor. The reference can source up to 50A for external loads. Pulse-Skipping Control Input. This four-level input determines the mode of operation under normal steady-state conditions and dynamic output-voltage transitions: VDD (5V) = Forced-PWM operation REF (2V) = Pulse-skipping mode (with forced-PWM during transitions) Open (3.3V) = Ultrasonic mode (without forced-PWM during transitions) GND = Pulse-skipping mode (without forced-PWM during transitions) 5V Analog Supply Voltage. Internally connected to VDD through an internal 20 resistor. Bypass VCC to analog ground using a 1F ceramic capacitor. Open-Drain Power-Good Output. PGOOD is low when the output voltage is more than 200mV (typ) below or 300mV (typ) above the target voltage (VREFIN), during soft-start, and soft-shutdown. After the soft-start circuit has terminated, PGOOD becomes high impedance if the output is in regulation. PGOOD is blanked--forced high-impedance state--when a dynamic REFIN transition is detected. Exposed Pad 1/Analog Ground. Internally connected to the controller's ground plane and substrate. Connect directly to ground. Exposed Pad 2/Inductor Connection. Internally connected to drain of the low-side MOSFET and source of the high-side MOSFET (Figure 2). Connect LX to the switched side of the inductor as shown in Figure 1. Exposed Pad 3/Power MOSFET Input Power Source. Internally connected to drain of the high-side MOSFET (Figure 2).
MAX15035
32
FB
33
ILIM
34
REFIN
35
REF
36
SKIP
37
VCC
38
PGOOD
EP1 (41) EP2 (42) EP3 (43)
AGND
LX
IN
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11
15A Step-Down Regulator with Internal Switches MAX15035
5V BIAS SUPPLY 4 C1 1F C2 1F AGND PWR 37 R10 100k 38 2 36 C3 1000pF PGOOD PGND VCC LX VDD TON IN BST 29 RTON 200k INPUT 7V TO 24V CIN CBST 0.1F 5, 16, EP2 6-15 PWR EN MAX15035 SKIP FB 32 COUT PWR L1 PWR OUTPUT 1.05V/1.50V 15A (MAX)
18-26, EP3 30
ON
OFF
GND/OPEN/REF/VDD
35
REF
RT 60.4k R4 40.2k NTC 10k B = 3435 SEE TABLE 1 FOR COMPONENT SELECTION. AGND
AGND
R1 49.9k 34 REFIN AGND 3, 28, EP1 ILIM 33
AGND LO HI
R3 97.6k
R2 54.9k
R5 49.4k
AGND
PWR
Figure 1. MAX15035 Standard Application Circuit
Table 1. Component Selection for Standard Applications
COMPONENT VOUT = 1.5V/1.05V AT 15A (FIGURE 1) VIN = 7V to 20V TON = 200k (300kHz) (3x) 10F, 25V Taiyo Yuden TMK432BJ106KM (2x) 330F, 6m, 2V Panasonic EEFSX0D331XR 1.0H, 5.3m, 27.5A Vishay IHLP4040DZER1R0 VOUT = 3.3V AT 6A (FIGURE 6) VIN = 7V to 20V TON = 332k (300kHz) (2x) 10F, 25V Taiyo Yuden TMK432BJ106KM (1x) 330F, 18m, 4V SANYO 4TPE330MI 1.5H, 14m, 9A NEC TOKIN MPLC1040L3R3 VOUT = 1.5V/1.05V AT 10A (FIGURE 1) VIN = 5V to 12V TON = 100k (600kHz) (3x) 10F, 25V Taiyo Yuden TMK432BJ106KM (1x) 470F, 7m, 2.5V SANYO 2R5TPLF470M7 0.47H, 3.7m, 15A Cooper FP3-R47-R
Input Capacitor Output Capacitor Inductor
Table 2. Component Suppliers
SUPPLIER AVX Corp. BI Technologies Cooper Bussmann KEMET Corp. Murata Mfg. Co., Ltd. NEC TOKIN Corp. Panasonic Corp. WEBSITE www.avxcorp.com www.bitechnologies.com www.cooperet.com www.kemet.com www.murata.com www.nec-tokin.com www.panasonic.com SUPPLIER Pulse Engineering SANYO NA Corp. Sumida Corp. Taiyo Yuden TDK Corp. TOKO America, Inc. Vishay Wurth Electronik GmbH & Co. KG WEBSITE www.pulseeng.com www.sanyo.com www.sumida.com www.t-yuden.com www.component.tdk.com www.tokoam.com www.vishay.com www.we-online.com
12
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15A Step-Down Regulator with Internal Switches
Standard Application Circuit
The MAX15035 standard application circuit (Figure 1) generates a 1.5V or 1.05V output rail for general-purpose use. See Table 1 for component selections. Table 2 lists the component suppliers.
Detailed Description
The MAX15035 step-down controller is ideal for lowduty-cycle (high-input voltage to low-output voltage) applications. Maxim's proprietary Quick-PWM pulsewidth modulator in the MAX15035 is specifically designed for handling fast-load steps while maintaining a relatively constant operating frequency and inductor operating point over a wide range of input voltages. The Quick-PWM architecture circumvents the poor load-transient timing problems of fixed-frequency, current-mode PWMs while also avoiding the problems caused by widely varying switching frequencies in conventional constant-on-time (regardless of input voltage) pulse-frequency modulation (PFM) control schemes.
On-Time One-Shot The heart of the PWM core is the one-shot that sets the high-side switch on-time. This fast, low-jitter, adjustable one-shot includes circuitry that varies the on-time in response to input and output voltage. The high-side switch on-time is inversely proportional to the input voltage as sensed by the TON input, and proportional to the feedback voltage as sensed by the FB input: On-Time (tON) = tSW (VFB/VIN) where tSW (switching period) is set by the resistance (RTON) between TON and IN. This algorithm results in a nearly constant switching frequency despite the lack of a fixed-frequency clock generator. Connect a resistor (RTON) between TON and IN to set the switching period tSW = 1/fSW:
V tSW = CTON (RTON + 6.5k ) FB VOUT where CTON = 16.26pF. When used with unity-gain feedback (VOUT = VFB), a 96.75k to 303.25k corresponds to switching periods of 167ns (600kHz) to 500ns (200kHz), respectively. High-frequency (600kHz) operation optimizes the application for the smallest component size, trading off efficiency due to higher switching losses. This may be acceptable in ultra-portable devices where the load currents are lower and the controller is powered from a lower voltage supply. Low-frequency (200kHz) operation offers the best overall efficiency at the expense of component size and board space. For continuous conduction operation, the actual switching frequency can be estimated by: VFB + VDIS fSW = tON (VIN - VCHG ) where VDIS is the sum of the parasitic voltage drops in the inductor discharge path, including synchronous rectifier, inductor, and PCB resistances; VCHG is the sum of the resistances in the charging path, including the highside switch, inductor, and PCB resistances; and tON is the on-time calculated by the MAX15035.
MAX15035
+5V Bias Supply (VCC/VDD) The MAX15035 requires an external 5V bias supply in addition to the input. See Figure 6 for an optional 5V bias generation circuit. The 5V bias supply powers both the PWM controller and internal gate-drive power, so the maximum current drawn is determined by: IBIAS = IQ + fSWQG = 2mA to 20mA (typ) The MAX15035 includes a 20 resistor between VDD and VCC, simplifying the PCB layout requirement. Free-Running Constant-On-Time PWM Controller with Input Feed-Forward
The Quick-PWM control architecture is a pseudo-fixedfrequency, constant on-time, current-mode regulator with voltage feed-forward (Figure 2). This architecture relies on the output filter capacitor's ESR to act as a current-sense resistor, so the output ripple voltage provides the PWM ramp signal. The control algorithm is simple: the high-side switch on-time is determined solely by a one-shot whose pulse width is inversely proportional to input voltage and directly proportional to output voltage. Another one-shot sets a minimum offtime (200ns typ). The on-time one-shot is triggered if the error comparator is low, the low-side switch current is below the valley current-limit threshold, and the minimum off-time one-shot has timed out.
Power-Up Sequence (POR, UVLO)
The MAX15035 is enabled when EN is driven high and the 5V bias supply (V DD) is present. The reference powers up first. Once the reference exceeds its UVLO threshold, the internal analog blocks are turned on and masked by a 50s one-shot delay in order to allow the bias circuitry and analog blocks enough time to settle to their proper states. With the control circuitry reliably powered up, the PWM controller may begin switching.
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13
15A Step-Down Regulator with Internal Switches MAX15035
TON ON-TIME COMPUTE IN FB Q tOFF(MIN) TRIG ONE-SHOT IN Q LX
BST
tON TRIG ONE-SHOT
S Q R
ERROR AMPLIFIER
INTEGRATOR (CCV) VDD
S Q R PGND
FB BLANK EA + 0.3V
QUADLEVEL DECODE
SKIP
FAULT
ZERO CROSSING
PGOOD AND FAULT PROTECTION
VALLEY CURRENT LIMIT
ILIM EA - 0.2V EN SOFT-START/ SOFT-STOP EA 2V REF REF VCC
PGOOD
REFIN
BLANK
MAX15035
DYNAMIC OUTPUT TRANSITION DETECTION
Figure 2. MAX15035 Block Diagram
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15A Step-Down Regulator with Internal Switches
Power-on reset (POR) occurs when VCC rises above approximately 3V, resetting the fault latch and preparing the controller for operation. The VCC UVLO circuitry inhibits switching until VCC rises above 4.25V. The controller powers up the reference once the system enables the controller, VCC exceeds 4.25V, and EN is driven high. With the reference in regulation, the controller ramps the output voltage to the target REFIN voltage with a 1.2mV/s slew rate: VFB VFB t START = = 1.2mV s 1.2V ms The soft-start circuitry does not use a variable current limit, so full output current is available immediately. PGOOD becomes high impedance approximately 200s after the target REFIN voltage has been reached. The MAX15035 automatically uses pulse-skipping mode during soft-start and uses forced-PWM mode during soft-shutdown, regardless of the SKIP configuration. For automatic startup, the input voltage should be present before VCC. If the controller attempts to bring the output into regulation without the input voltage present, the fault latch trips. The controller remains shut down until the fault latch is cleared by toggling EN or cycling the VCC power supply below 0.5V. If the VCC voltage drops below 4.25V, the controller assumes that there is not enough supply voltage to make valid decisions. To protect the output from overvoltage faults, the controller shuts down immediately and forces a high impedance on LX. When a fault condition--output UVP or thermal shutdown--activates the shutdown sequence, the protection circuitry sets the fault latch to prevent the controller from restarting. To clear the fault latch and reactivate the controller, toggle EN or cycle VCC power below 0.5V. The MAX15035 automatically uses pulse-skipping mode during soft-start and uses forced-PWM mode during soft-shutdown, regardless of the SKIP configuration.
MAX15035
Modes of Operation
S Ultrasonic Mode (SKIP = Open = 3.3V) Leaving SKIP unconnected activates a unique pulseskipping mode with a minimum switching frequency of 18kHz. This ultrasonic pulse-skipping mode eliminates audio-frequency modulation that would otherwise be present when a lightly loaded controller automatically skips pulses. In ultrasonic mode, the controller automatically transitions to fixed-frequency PWM operation when the load reaches the same critical conduction point (ILOAD(SKIP)) that occurs when normally pulse skipping. An ultrasonic pulse occurs when the controller detects that no switching has occurred within the last 33s. Once triggered, the ultrasonic controller turns on the low-side MOSFET to induce a negative inductor current (Figure 3). After the inductor current reaches the negative ultrasonic current threshold, the controller turns off the low-side MOSFET and triggers a constant on-time.
Shutdown
When the system pulls EN low, the MAX15035 enters low-power shutdown mode. PGOOD is pulled low immediately, and the output voltage ramps down with a 1.2mV/s slew rate: VFB VFB t SHDN = = 1.2mV s 1.2V ms Slowly discharging the output capacitors by slewing the output over a long period of time (typically 0.5ms to 2ms) keeps the average negative inductor current low (damped response), thereby preventing the negative output-voltage excursion that occurs when the controller discharges the output quickly by permanently turning on the low-side MOSFET (underdamped response). This eliminates the need for the Schottky diode normally connected between the output and ground to clamp the negative output-voltage excursion. After the controller reaches the zero target, the MAX15035 shuts down completely--the drivers are disabled (high impedance on LX)--the reference turns off, and the supply currents drop to about 0.1A (typ).
33s (typ) INDUCTOR CURRENT
ZERO-CROSSING DETECTION
0 ISONIC
ON-TIME (tON)
Figure 3. Ultrasonic Waveform
15
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15A Step-Down Regulator with Internal Switches MAX15035
When the on-time expires, the controller re-enables the low-side MOSFET until the controller detects that the inductor current drops below the zero-crossing threshold. Starting with a negative inductor current pulse greatly reduces the peak output voltage when compared to starting with a positive inductor current pulse. The output voltage at the beginning of the ultrasonic pulse determines the negative ultrasonic current threshold, resulting in the following equation: VISONIC = IL x 0.006 = ( VREFIN - VFB ) x 0.7 where VFB > VREFIN. S Forced-PWM Mode (SKIP = VDD) The low-noise, forced-PWM mode (SKIP = VDD) disables the zero-crossing comparator, which controls the low-side switch on-time. This forces the low-side gatedrive waveform to constantly be the complement of the high-side gate-drive waveform, so the inductor current reverses at light loads while LX maintains a duty factor of VOUT/VIN. The benefit of forced-PWM mode is to keep the switching frequency fairly constant. However, forced-PWM operation comes at a cost: the no-load 5V bias current remains between 10mA to 50mA, depending on the switching frequency. The MAX15035 automatically always uses forced-PWM operation during shutdown, regardless of the SKIP configuration. S Automatic Pulse-Skipping Mode (SKIP = GND or REF) In skip mode (SKIP = GND or 3.3V), an inherent automatic switchover to PFM takes place at light loads. This switchover is affected by a comparator that truncates the low-side switch on-time at the inductor current's zero crossing. The zero-crossing comparator threshold is set by the differential across LX to PGND. DC output-accuracy specifications refer to the threshold of the error comparator. When the inductor is in continuous conduction, the MAX15035 regulates the valley of the output ripple, so the actual DC output voltage is higher than the trip level by 50% of the output ripple voltage. In discontinuous conduction (SKIP = GND and IOUT < ILOAD(SKIP)), the output voltage has a DC regulation level higher than the error-comparator threshold by approximately 1.5% due to slope compensation. When SKIP is pulled to GND, the MAX15035 remains in pulse-skipping mode. Since the output is not able to sink current, the timing for negative dynamic output-voltage transitions depends on the load current and output capacitance. Letting the output voltage drift down is typically recommended to reduce the potential for audible noise since this eliminates the input current surge during negative output-voltage transitions. See Figures 4 and 5.
DYNAMIC REFIN WINDOW REFIN
ACTUAL VOUT OUTPUT VOLTAGE INTERNAL TARGET
INTERNAL PWM CONTROL
SKIP
LX PGOOD OVP
NO PULSES: VOUT > VTARGET
BLANK HIGH-Z SET TO REF + 300mV
BLANK HIGH-Z EA TARGET + 300mV
DYNAMIC TRANSITION WHEN SKIP# = GND
Figure 4. Dynamic Transition when SKIP = GND
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15A Step-Down Regulator with Internal Switches MAX15035
DYNAMIC REFIN WINDOW
REFIN
OUTPUT VOLTAGE
INTERNAL EA TARGET = ACTUAL VOUT
INTERNAL PWM CONTROL
PWM
SKIP
PWM
SKIP
LX PGOOD OVP BLANK HIGH-Z SET TO REF + 300mV EA TARGET + 300mV BLANK HIGH-Z EA TARGET + 300mV
DYNAMIC TRANSITION WHEN SKIP = REF
Figure 5. Dynamic Transition when SKIP = REF
Valley Current-Limit Protection
The current-limit circuit employs a unique "valley" current-sensing algorithm that senses the inductor current through the low-side MOSFET. If the current through the low-side MOSFET exceeds the valley current-limit threshold, the PWM controller is not allowed to initiate a new cycle. The actual peak current is greater than the valley current-limit threshold by an amount equal to the inductor ripple current. Therefore, the exact current-limit characteristic and maximum load capability are a function of the inductor value and input voltage. When combined with the undervoltage protection circuit, this current-limit method is effective in almost every circumstance. In forced-PWM mode, the MAX15035 also implements a negative current limit to prevent excessive reverse inductor currents when VOUT is sinking current. The negative current-limit threshold is set to approximately 120% of the positive current limit.
Under steady-state conditions, the MAX15035's internal integrator corrects for this 50% output ripple-voltage error, resulting in an output voltage that is dependent only on the offset voltage of the integrator amplifier provided in the Electrical Characteristics table.
Integrated Output Voltage
The MAX15035 regulates the valley of the output ripple, so the actual DC output voltage is higher than the slopecompensated target by 50% of the output ripple voltage.
Dynamic Output Voltages The MAX15035 regulates FB to the voltage set at REFIN. By changing the voltage at REFIN (Figure 1), the MAX15035 can be used in applications that require dynamic output-voltage changes between two set points. For a step-voltage change at REFIN, the rate of change of the output voltage is limited either by the internal 9.45mV/s slew-rate circuit or by the component selection--inductor current ramp, the total output capacitance, the current limit, and the load during the transition--whichever is slower. The total output capacitance determines how much current is needed to change the output voltage, while the inductor limits the current ramp rate. Additional load current may slow down the output voltage change during a positive REFIN voltage change, and may speed up the output voltage change during a negative REFIN voltage change.
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17
15A Step-Down Regulator with Internal Switches MAX15035
RTON 332k
5V BIAS SUPPLY
4 C1 1F C2 1F PWR 37
VDD
TON IN BST
29
18-26, EP3 30 CBST 0.1F CIN PWR L1
INPUT 7V TO 24V
VCC LX 5, 16, EP2 6-15
AGND
R10 100k 38 PGOOD EN SKIP
OUTPUT 3.3V R6 13.0k COUT PWR
PGND
ON
OFF
2 36
PWR FB 32
GND/OPEN/REF/VDD C3 1000pF
MAX15035
35 REF R4 49.9k REF R5 49.4k AGND PWR AGND
R7 20k AGND
AGND 34 REFIN AGND 3, 28, EP1 ILIM 33
7V TO 15V INPUT
5VBIAS
1k OPTIONAL
5.6V
SEE TABLE 1 FOR COMPONENT SELECTION.
Figure 6. High Output-Voltage Application Using a Feedback Divider
Output Voltages Greater than 2V Although REFIN is limited to a 0 to 2V range, the output-voltage range is unlimited since the MAX15035 utilizes a high-impedance feedback input (FB). By adding a resistive voltage-divider from the output to FB to analog ground (Figure 6), the MAX15035 supports output voltages above 2V. However, the controller also uses FB to determine the on-time, so the voltage-divider influences the actual switching frequency, as detailed in the On-Time One-Shot section. Internal Integration An integrator amplifier forces the DC average of the FB voltage to equal the target voltage. This internal amplifier integrates the feedback voltage and provides a fine adjustment to the regulation voltage (Figure 2), allowing accurate DC output-voltage regulation regardless of the compensated feedback ripple voltage and internal slope-compensation variation. The integrator amplifier has the ability to shift the output voltage by 55mV (typ).
The MAX15035 disables the integrator by connecting the amplifier inputs together at the beginning of all downward REFIN transitions done in pulse-skipping mode. The integrator remains disabled until 20s after the transition is completed (the internal target settles) and the output is in regulation (edge detected on the error comparator).
Power-Good Outputs (PGOOD) and Fault Protection
PGOOD is the open-drain output that continuously monitors the output voltage for undervoltage and overvoltage conditions. PGOOD is actively held low in shutdown (EN = GND), and during soft-start and soft-shutdown. Approximately 200s (typ) after the softstart terminates, PGOOD becomes high impedance as long as the feedback voltage is above the UVP threshold (REFIN - 200mV) and below the OVP threshold (REFIN + 300mV). PGOOD goes low if the feedback voltage drops 200mV below the target voltage (REFIN) or rises 300mV above the target voltage (REFIN), or the SMPS controller is shut down. For a logic-level PGOOD
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15A Step-Down Regulator with Internal Switches MAX15035
POWER-GOOD AND FAULT PROTECTION TARGET - 200mV TARGET + 300mV FB EN SOFT-START COMPLETE ONESHOT 200s FAULT LATCH FAULT OVP
UVP
OVP ENABLED
POWER-GOOD
IN CLK
OUT
Figure 7. Power-Good and Fault Protection
output voltage, connect an external pullup resistor between PGOOD and VDD. A 100k pullup resistor works well in most applications. Figure 7 shows the power-good and fault-protection circuitry.
high impedance on LX. Toggle EN or cycle VCC power below VCC POR to reactivate the controller after the junction temperature cools by 15C.
Quick-PWM Design Procedure
Firmly establish the input voltage range and maximum load current before choosing a switching frequency and inductor operating point (ripple-current ratio). The primary design trade-off lies in choosing a good switching frequency and inductor operating point, and the following four factors dictate the rest of the design: * Input Voltage Range: The maximum value (V(INMAX)) must accommodate the worst-case input supply voltage. The minimum value (V(INMIN)) must account for the lowest input voltage after drops due to connectors, fuses, and battery selector switches. If there is a choice at all, lower input voltages result in better efficiency. * Maximum load current: There are two values to consider. The peak load current (I LOAD(MAX) ) determines the instantaneous component stresses and filtering requirements, and thus drives output capacitor selection, inductor saturation rating, and the design of the current-limit circuit. The continuous load current (ILOAD) determines the thermal stresses and thus drives the selection of input capacitors, MOSFETs, and other critical heat-contributing components.
19
Overvoltage Protection (OVP) When the internal feedback voltage rises 300mV above the target voltage and OVP is enabled, the OVP comparator immediately forces LX low, pulls PGOOD low, sets the fault latch, and disables the SMPS controller. Toggle EN or cycle VCC power below the VCC POR to clear the fault latch and restart the controller. Undervoltage Protection (UVP) When the feedback voltage drops 200mV below the target voltage (REFIN), the controller immediately pulls PGOOD low and triggers a 200s one-shot timer. If the feedback voltage remains below the undervoltage fault threshold for the entire 200s, the undervoltage fault latch is set and the SMPS begins the shutdown sequence. When the internal target voltage drops below 0.1V, the MAX15035 forces a high impedance on LX. Toggle EN or cycle VCC power below VCC POR to clear the fault latch and restart the controller. Thermal-Fault Protection (TSHDN) The MAX15035 features a thermal fault-protection circuit. When the junction temperature rises above +160C, a thermal sensor activates the fault latch, pulls PGOOD low, shuts down the controller, and forces a
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15A Step-Down Regulator with Internal Switches MAX15035
* Switching frequency: This choice determines the basic trade-off between size and efficiency. The optimal frequency is largely a function of maximum input voltage due to MOSFET switching losses that are proportional to frequency and VIN2. The optimum frequency is also a moving target, due to rapid improvements in MOSFET technology that are making higher frequencies more practical. Inductor operating point: This choice provides trade-offs between size vs. efficiency and transient response vs. output noise. Low inductor values provide better transient response and smaller physical size, but also result in lower efficiency and higher output noise due to increased ripple current. The minimum practical inductor value is one that causes the circuit to operate at the edge of critical conduction (where the inductor current just touches zero with every cycle at maximum load). Inductor values lower than this grant no further size-reduction benefit. The optimum operating point is usually found between 20% and 50% ripple current. which can be calculated from the on-time and minimum off-time. The worst-case output sag voltage can be determined by: L ILOAD(MAX) VSAG =
(
)
*
( V - V )t 2COUT VOUT IN OUT SW - tOFF(MIN) VIN
2 VOUT tSW + tOFF(MIN) M VIN
where tOFF(MIN) is the minimum off-time (see the Electrical Characteristics table). The amount of overshoot due to stored inductor energy when the load is removed can be calculated as: VSOAR
(ILOAD(MAX) )2L
2COUT VOUT
Setting the Valley Current Limit
The minimum current-limit threshold must be high enough to support the maximum load current when the current limit is at the minimum tolerance value. The valley of the inductor current occurs at ILOAD(MAX) minus half the inductor ripple current (IL); therefore: ILIMIT(LOW) > ILOAD(MAX) - IL 2
Inductor Selection
The switching frequency and operating point (% ripple current or LIR) determine the inductor value as follows: VOUT VIN - VOUT L= fSWILOAD(MAX)LIR VIN Find a low-loss inductor having the lowest possible DC resistance that fits in the allotted dimensions. Ferrite cores are often the best choice, although powdered iron is inexpensive and can work well at 200kHz. The core must be large enough not to saturate at the peak inductor current (IPEAK): IPEAK = ILOAD(MAX) + IL 2
Transient Response
The inductor ripple current impacts transient-response performance, especially at low VIN - VOUT differentials. Low inductor values allow the inductor current to slew faster, replenishing charge removed from the output filter capacitors by a sudden load step. The amount of output sag is also a function of the maximum duty factor,
where I LIMIT(LOW) equals the minimum current-limit threshold voltage divided by 0.006. The valley current-limit threshold is precisely 1/20 the voltage seen at ILIM. Connect a resistive divider from REF to ILIM to analog ground (AGND) to set a fixed valley current-limit threshold. The external 400mV to 2V adjustment range corresponds to a 20mV to 100mV valley current-limit threshold. When adjusting the currentlimit threshold, use 1% tolerance resistors and a divider current of approximately 5A to 10A to prevent significant inaccuracy in the valley current-limit tolerance. The MAX15035 uses the low-side MOSFET's on-resistance as the current-sense element (R SENSE = RDS(ON)). A good general rule is to allow 0.5% additional resistance for each degree celsius of temperature rise, which must be included in the design margin unless the design includes an NTC thermistor in the ILIM resistive voltage-divider to thermally compensate the current-limit threshold.
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15A Step-Down Regulator with Internal Switches MAX15035
5V BIAS SUPPLY 4 C1 1F C2 1F AGND PWR 37 R10 100k 38 2 36 C3 1000pF PGOOD EN MAX15035 SKIP FB VCC LX PGND VDD TON IN BST 29 RTON 200k
18-26, EP3 30 CBST 0.1F CIN PWR L1
INPUT 7V TO 24V
5, 16, EP2 6-15 PWR 32
OUTPUT 1.50V 10A 1.05V 7A COUT PWR
ON
OFF
GND/OPEN/REF/VDD
35
REF
AGND
R8 100k R4 49.9k REF R5 49.4k AGND
R1 49.9k 34 REFIN AGND 3, 28, EP1 ILIM 33
AGND LO HI
R3 97.6k
R2 54.9k
AGND
PWR AGND
SEE TABLE 1 FOR COMPONENT SELECTION.
Figure 8. Standard Application with Foldback Current-Limit Protection
Foldback Current Limit Including an additional resistor between ILIM and the output automatically creates a current-limit threshold that folds back as the output voltage drops (see Figure 8). The foldback current limit helps limit the inductor current under fault conditions, but must be carefully designed to provide reliable performance under normal conditions. The current-limit threshold must not be set too low, or the controller will not reliably power up. To ensure the controller powers up properly, the minimum current-limit threshold (when VOUT = 0V) must always be greater than the maximum load during startup (which at least consists of leakage currents), plus the maximum current required to charge the output capacitors: ISTART = COUT x 1mV/s + ILOAD(START)
In core and chipset converters and other applications where the output is subject to large-load transients, the output capacitor's size typically depends on how much ESR is needed to prevent the output from dipping too low under a load transient. Ignoring the sag due to finite capacitance:
(RESR + RPCB ) I
VSTEP
LOAD(MAX)
Output Capacitor Selection
The output filter capacitor must have low enough equivalent series resistance (ESR) to meet output ripple and load-transient requirements. Additionally, the ESR impacts stability requirements. Capacitors with a high ESR value (polymers/tantalums) do not need additional external compensation components.
In low-power applications, the output capacitor's size often depends on how much ESR is needed to maintain an acceptable level of output ripple voltage. The output ripple voltage of a step-down controller equals the total inductor ripple current multiplied by the output capacitor's ESR. The maximum ESR to meet ripple requirements is: V x f xL IN SW VRIPPLE RESR ( VIN - VOUT ) VOUT where fSW is the switching frequency.
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15A Step-Down Regulator with Internal Switches
With most chemistries (polymer, tantalum, aluminum electrolytic), the actual capacitance value required relates to the physical size needed to achieve low ESR and the chemistry limits of the selected capacitor technology. Ceramic capacitors provide low ESR, but the capacitance and voltage rating (after derating) are determined by the capacity needed to prevent VSAG and VSOAR from causing problems during load transients. Generally, once enough capacitance is added to meet the overshoot requirement, undershoot at the rising load edge is no longer a problem (see the VSAG and VSOAR equations in the Transient Response section). Thus, the output capacitor selection requires carefully balancing capacitor chemistry limitations (capacitance vs. ESR vs. voltage rating) and cost. See Figure 9. For a standard 300kHz application, the effective zero frequency must be well below 95kHz, preferably below 50kHz. With these frequency requirements, standard tantalum and polymer capacitors already commonly used have typical ESR zero frequencies below 50kHz, allowing the stability requirements to be achieved without any additional current-sense compensation. In the standard application circuit (Figure 1), the ESR needed to support a 15mV P-P ripple is 15mV/(10A x 0.3) = 5m. Two 330F, 9m polymer capacitors in parallel provide 4.5m (max) ESR and 1/(2 x 330F x 9m) = 53kHz ESR zero frequency. See Figure 10.
MAX15035
IN BST CIN PWR L1 LX PGND MAX15035 FB AGND AGND COUT PWR PWR
INPUT
Output Capacitor Stability Considerations For Quick-PWM controllers, stability is determined by the in-phase feedback ripple relative to the switching frequency, which is typically dominated by the output ESR. The boundary of instability is given by the following equation: fSW 1 2REFFCOUT REFF = RESR + RPCB + RCOMP
where COUT is the total output capacitance, RESR is the total ESR of the output capacitors, RPCB is the parasitic board resistance between the output capacitors and feedback sense point, and RCOMP is the effective resistance of the DC- or AC-coupled current-sense compensation (see Figure 11).
OUTPUT
STABILITY REQUIREMENT 1 RESRCOUT 2fSW
Figure 9. Standard Application with Output Polymer or Tantalum
IN BST DH L1 LX PGND CIN PWR
INPUT
PCB PARASITIC RESISTANCE-SENSE RESISTANCE FOR EVALUATION
OUTPUT COUT CCOMP 0.1F PWR PWR RCOMP 100 OUTPUT VOLTAGE REMOTELY SENSED NEAR POINT OF LOAD CLOAD PWR
MAX15035 FB GND AGND PWR
STABILITY REQUIREMENT 1 1 RESRCOUT AND RCOMPCCOMP 2fSW fSW FEEDBACK RIPPLE IN PHASE WITH INDUCTOR CURRENT
Figure 10. Remote-Sense Compensation for Stability and Noise Immunity
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15A Step-Down Regulator with Internal Switches
Ceramic capacitors have a high-ESR zero frequency, but applications with sufficient current-sense compensation may still take advantage of the small size, low ESR, and high reliability of the ceramic chemistry. Using the inductor DCR, applications using ceramic output capacitors may be compensated using either a DC compensation or AC compensation method (Figure 11). The DC-coupling requires fewer external compensation capacitors, but this also creates an output load line that depends on the inductor's DCR (parasitic resistance). Alternatively, the current-sense information may be ACcoupled, allowing stability to be dependent only on the inductance value and compensation components and eliminating the DC load line.
MAX15035
OPTION A: DC-COUPLED CURRENT-SENSE COMPENSATION DC COMPENSATION IN BST CIN PWR L LX PGND MAX15035 FB GND AGND PWR STABILITY REQUIREMENT RSENA RSENB PWR CSEN COUT PWR OUTPUT INPUT <> FEWER COMPENSATION COMPONENTS <> CREATES OUTPUT LOAD LINE <> LESS OUTPUT CAPACITANCE REQUIRED FOR TRANSIENT RESPONSE
L RSENBRDCR 1 AND LOAD LINE = R COUT 2f RSENA + RSENB SW ( SENA || RSENB )CSEN
FEEDBACK RIPPLE IN PHASE WITH INDUCTOR CURRENT
OPTION B: AC-COUPLED CURRENT-SENSE COMPENSATION IN CIN BST PWR INPUT AC COMPENSATION <> NOT DEPENDENT ON ACTUAL DCR VALUE <> NO OUTPUT LOAD LINE
L LX PGND MAX15035 FB RCOMP GND STABILITY REQUIREMENT AGND PWR RSEN CSEN PWR CCOMP COUT PWR OUTPUT
L 1 1 AND RCOMPCCOMP COUT RSENCSEN 2fSW fSW
FEEDBACK RIPPLE IN PHASE WITH INDUCTOR CURRENT
Figure 11. Feedback Compensation for Ceramic Output Capacitors
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15A Step-Down Regulator with Internal Switches
When only using ceramic output capacitors, output overshoot (VSOAR) typically determines the minimum output capacitance requirement. Their relatively low capacitance value may allow significant output overshoot when stepping from full-load to no-load conditions, unless designed with a small inductance value and high switching frequency to minimize the energy transferred from the inductor to the capacitor during load-step recovery. Unstable operation manifests itself in two related but distinctly different ways: double pulsing and feedbackloop instability. Double pulsing occurs due to noise on the output or because the ESR is so low that there is not enough voltage ramp in the output voltage signal. This "fools" the error comparator into triggering a new cycle immediately after the minimum off-time period has expired. Double pulsing is more annoying than harmful, resulting in nothing worse than increased output ripple. However, it can indicate the possible presence of loop instability due to insufficient ESR. Loop instability can result in oscillations at the output after line or load steps. Such perturbations are usually damped, but can cause the output voltage to rise above or fall below the tolerance limits. The easiest method for checking stability is to apply a very fast zero-to-max load transient and carefully observe the output voltage-ripple envelope for overshoot and ringing. It can help to simultaneously monitor the inductor current with an AC current probe. Do not allow more than one cycle of ringing after the initial step-response under/overshoot.
MAX15035
Minimum Input-Voltage Requirements and Dropout Performance
The output voltage-adjustable range for continuousconduction operation is restricted by the nonadjustable minimum off-time one-shot. For best dropout performance, use the slower (200kHz) on-time settings. When working with low-input voltages, the duty-factor limit must be calculated using worst-case values for on- and off-times. Manufacturing tolerances and internal propagation delays introduce an error to the on-times. This error is greater at higher frequencies. Also, keep in mind that transient response performance of buck regulators operated too close to dropout is poor, and bulk output capacitance must often be added (see the VSAG equation in the Quick-PWM Design Procedure section). The absolute point of dropout is when the inductor current ramps down during the minimum off-time (IDOWN) as much as it ramps up during the on-time (IUP). The ratio h = IUP/IDOWN is an indicator of the ability to slew the inductor current higher in response to increased load, and must always be greater than 1. As h approaches 1, the absolute minimum dropout point, the inductor current cannot increase as much during each switching cycle and V SAG greatly increases unless additional output capacitance is used. A reasonable minimum value for h is 1.5, but adjusting this up or down allows trade-offs between VSAG, output capacitance, and minimum operating voltage. For a given value of h, the minimum operating voltage can be calculated as: V - VDROOP + VCHG VIN(MIN) = OUT 1 - h x tOFF(MIN)fSW
Input Capacitor Selection
The input capacitor must meet the ripple current requirement (IRMS) imposed by the switching currents. The IRMS requirements may be determined by the following equation: I IRMS = LOAD VOUT (VIN - VOUT ) VIN The worst-case RMS current requirement occurs when operating with VIN = 2VOUT. At this point, the above equation simplifies to IRMS = 0.5 x ILOAD. For most applications, nontantalum chemistries (ceramic, aluminum, or OS-CON) are preferred due to their resistance to inrush surge currents typical of systems with a mechanical switch or connector in series with the input. If the Quick-PWM controller is operated as the second stage of a two-stage power-conversion system, tantalum input capacitors are acceptable. In either configuration, choose an input capacitor that exhibits less than +10C temperature rise at the RMS input current for optimal circuit longevity.
24
(
)
where VDROOP is the voltage-positioning droop, VCHG is the parasitic voltage drop in the charge path, and tOFF(MIN) is from the Electrical Characteristics table. The absolute minimum input voltage is calculated with h = 1. If the calculated VIN(MIN) is greater than the required minimum input voltage, reduce the operating frequency or add output capacitance to obtain an acceptable VSAG. If operation near dropout is anticipated, calculate VSAG to be sure of adequate transient response. Dropout design example: VOUT = 3.3V fSW = 300kHz tOFF(MIN) = 350ns VDROOP = 0V VCHG = 150mV (10A load) h = 1.5
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15A Step-Down Regulator with Internal Switches
3.3V - 0V + 150mV VIN(MIN) = = 3.74V 1 - (1.5 x 350ns x 300kHz) Calculating again with h = 1 gives the absolute limit of dropout: 3.3V - 0V + 150mV VIN(MIN) = = 3.52V 1 - (1.0 x 350ns x 300kHz) Therefore, VIN must be greater than 3.52V, even with very large output capacitance, and a practical input voltage with reasonable output capacitance would be 3.74V. copper PCB (2oz vs. 1oz) can enhance full-load efficiency by 1% or more. Correctly routing PCB traces is a difficult task that must be approached in terms of fractions of centimeters, where a single milliohms of excess trace resistance causes a measurable efficiency penalty. 4) Keep the power plane--especially LX--away from sensitive analog areas (REF, REFIN, FB, ILIM).
MAX15035
Layout Procedure
1) Place the power components first, with ground terminals adjacent (CIN and COUT). If possible, make all these connections on the top layer with wide, copper-filled areas. 2) Make the DC-DC controller ground connections as shown in Figure 1. This diagram can be viewed as having four separate ground planes: input/output ground, where all the high-power components go; the power ground plane, where the PGND pin and VDD bypass capacitor go; the controller's analog ground plane where sensitive analog components, the controller's AGND pin, and VCC bypass capacitor go. The controller's AGND plane must meet the PGND plane only at a single point directly beneath the IC. This point must also be very close to the output capacitor ground terminal. 3) Connect the output power planes (VCORE and system ground planes) directly to the output filter capacitor positive and negative terminals with multiple vias. Place the entire DC-DC converter circuit as close to the load as is practical.
Applications Information
PCB Layout Guidelines
Careful PCB layout is critical to achieve low switching losses and clean, stable operation. The switching power stage requires particular attention. If possible, mount all the power components on the top side of the board with their ground terminals flush against one another. Follow these guidelines for good PCB layout: 1) Keep the high-current paths short, especially at the ground terminals. This is essential for stable, jitterfree operation. 2) Connect all analog grounds to a separate solid copper plane, which connects to the AGND pin of the Quick-PWM controller. This includes the VCC bypass capacitor, REF bypass capacitors, REFIN components, and feedback compensation/dividers. 3) Keep the power traces and load connections short. This is essential for high efficiency. The use of thick
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25
15A Step-Down Regulator with Internal Switches MAX15035
Chip Information
TRANSISTOR COUNT: 7169 PROCESS: BiCMOS
PACKAGE TYPE 40 TQFN
Package Information
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages. PACKAGE CODE T4066-MCM DOCUMENT NO. 21-0177
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15A Step-Down Regulator with Internal Switches
Revision History
REVISION NUMBER 0 1 2 REVISION DATE 5/08 7/08 10/08 Initial release Modified Figure 1, Tables 1 and 2. Updated Pin Description, Figure 1, and Detailed Description. DESCRIPTION PAGES CHANGED -- 12 11, 12, 13, 16, 18-21, 24
MAX15035
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 27
(c) 2008 Maxim Integrated Products
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